Software Tools and Techniques for HPC, Clouds, and Server-Class SoCs (PACT2015)

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SUNDAY, October 18, 2015, 8:30am – 5:00pm (Sir Francis Drake Hotel, San Francisco, CA)
The 24th International Conference on Parallel Architectures and Compilation Techniques (PACT)


The current mainstream HPC and Cloud has relied upon Commercial off-the-Shelf (COTS) commodity building blocks to enable cost-effective design by sharing costs across a larger computing ecosystem. Modern HPC nodes use commodity chipsets and processor chips integrated together on custom motherboards. An alternative model for commodity HPC, high performance embedded, mobile and Cloud technology is emerging where the chip acts as the “silicon motherboard” that interconnects commodity Intellectual Property (IP) circuit building blocks to create a complete integrated System-on-a-Chip (SoC). This silicon-motherboard approach is still very much COTS, but the commodities are licensable IP for preverified circuit designs (the Lego-blocks for SoC designs) rather than the chips. By leveraging the enormous commodity IP market for design tools, processors, memory controllers, and I/O circuit designs, a chip designer can focus their effort and NRE costs on engineering a handful of essential features that are not covered by the commodity ecosystem. This presents a new design paradigm and architecture for large-scale computing including both Clouds and HPC systems. This workshop will explore the gaps remaining in compiler, execution and programming models for developing applications suitable for highly scalable, semi-custom HPC and Cloud systems. Visit www.socforhpc.org for more information.

Registration

Registration for PACT2015 can be found here.
Hotel registration can be found here.

Location

Sir Francis Drake Hotel
450 Powell Street
San Francisco, CA 94102

Organizers

  • John Shalf – Lawrence Berkeley National Lab, Berkeley, CA
  • James Ang – Sandia National Laboratories, Albequerque, NM
  • David Donofrio – Lawrence Berkeley National Lab, Berkeley, CA
  • Farzad Fatollahi-Fard – Lawrence Berkeley National Lab, Berkeley, CA
  • Jeanine Cook – Sandia National Laboratories, Albequerque, NM
  • Rob Hoekstra – Sandia National Laboratories, Albequerque, NM

Schedule

  • 08:30 - 09:00 Intro/Greetings
  • 09:00 - 09:30 Welcome and Overview
    • John Shalf and Jim Ang (Slides)
  • 09:30 - 10:00 Keynote Address
    • Kathy Yelick - Lawrence Berkeley National Lab (Slides)
  • 10:00 - 10:30 Hardware / Re-cap of DAC workshop
  • 10:30 - 10:45 Break
  • 10:45 - 12:00 Programming Environments and Tools
    • 10:45 - 11:05 Ron Dror - Stanford University
    • 11:05 - 11:35 Geraint North - ARM (Slides)
    • 11:35 - 11:55 John Leidel - Micron / Texas Tech (Slides)
  • 12:00 - 12:30 Discussion Topic 1: Programming Environments and Tools
  • 12:30 - 13:30 Lunch
  • 13:30 - 14:30 OS / Runtimes
    • 13:30 - 13:50 Ron Brightwell - Sandia National Lab (Slides)
    • 13:50 - 14:10 Greg Stoner - AMD (Slides)
    • 14:10 - 14:30 Joshua Fryman - Intel (Slides)
  • 14:30 - 15:00 Discussion Topic 2: OS / Runtimes
  • 15:00 - 15:45 Applications
    • 15:00 - 15:20 Simon Hammond - Sandia National Lab (Slides)
    • 15:20 - 15:40 Michael Wehner - Lawrence Berkeley National Lab (Slides)
  • 15:45 - 16:00 Break
  • 16:00 - 16:30 Discussion Topic 3: Applications
  • 16:30 - 17:00 Wrap Up (John Shalf and Jim Ang)

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